I am working on a CAN driver for libmaple. I am part-way there, but am banging my head against the wall with why my Rx buffer, FIFO0, remains empty (register CAN_RF0R = 0x0.)
I'm fairly sure that I have the peripheral clocks running, correct Tx/Rx AFIO pin-mapping and the Bit Timing Register correct because of the status of the Error Status Register CAN_ESR, which shows various error states when the BTR is changed to some other value or when the CANbus is de-powered or incorrectly terminated. When the bus is powered, terminated and I set CAN_BTR to the right values, CAN_ESR = 0x0 indicating successful reception.
I think the problem is related to my Rx message Filter setup, but I cannot see where.
I am trying at this stage to use a single 32-bit filter in Mask mode, associated with FIFO0 and with both filter banks set to 0x0, which as far as I can tell should let everything through. Here are my actual Filter register values (reading the register contents and outputting via Serial2, not just what I am trying to set up):
CAN_FMR = 0x2a1c0e00 (Filter 0 not in init mode, other bits at reset value)
CAN_FM1R = 0x0 (Filter Mode register: all in Identifier Mask (as opposed to Identifier List) mode)
CAN_FS1R = 0x1 (Filter Scale register: Filter 0 in single-32-bit mode (rather than 2x16-bit, since I will be dealing with 29-bit Extended CAN IDs later on))
CAN_FFA1R = 0x0 (Filter Assignment register: all filters assigned to FIFO0)
CAN_FA1R = 0x1 (Filter Activation register: filter 0 active.)
CAN_F0R1 = 0x0 (Filter 0 Bank 1 Identifier)
CAN_F0R2 = 0x0 (Filter 0 Bank 2, where 0 = 'don't care' on each of the bits in F0R1)
I have tried lots of different filter set-ups, but CAN_RF0R (Receive FIFO0 register) stays resolutely at 0x0.
Can anyone point out where I'm going wrong?
Thanks in advance!